Senior Manager, ASIC Engineering

Ciena is committed to our people-first philosophy. Our teams enjoy a culture focused on prioritizing a personalized and flexible work environment that empowers an individual’s passions, growth, wellbeing and belonging. We’re a technology company that leads with our humanity—driving our business priorities alongside meaningful social, community, and societal impact.

How You Will Contribute:

The Wavelogic family of products are widely used in Ciena's optical fiber transmission solutions and are one of the main contributors to Ciena's success in the telecommunications industry. To further strengthen our team, we are looking for an experienced ASIC Design Manager who will be involved in the development of these products, leading a team of digital design and verification engineers. Your role as an ASIC Design Manager will be lead the top-level assembly and verification for ASICs for the Wavelogic family of products.

• As an ASIC Design Manager you will be responsible to lead the team performing the top level assembly and verification of large deep submicron ASICs for the Wavelogic family of devices.
• You will be required to understand the architecture and functional requirements for the ASICs and communicate and collaborate with systems engineers and architects.
• You will work with various IP Design teams for the delivery of functional IP and integrate these deliveries into the top level of the ASIC. The team will be responsible for the end-to-end verification of the ASIC before the release to manufacturing.
• You will be responsible for overall roll-up and status reporting at project meetings.
• The team also contributes to the ASIC design and verification methodology and provides common infrastructure and support for the overall ASIC design community. This includes support for common infrastructure, re-use blocks, libraries, and providing support for various tools and design/verification flows.
• The team also supports early lab bring-up and debug as well as NPI in the early ASIC roll-out phase.
• You are responsible for the staffing, planning, and people management of the team.

The Must Haves:

• Electrical or computer engineering, computer science or other applicable scientific degree at the BEng/BSc or MEng/MSc level.
• 7+ years of relevant industry experience in ASIC or FPGA design, verification, and/or management
• A highly motivated self-starter, able to work independently with minimal supervision, but that works well with others in a dynamic environment.
• Ability to methodically tackle sophisticated technical problems and make trade-offs between technical solutions, schedule pressures and business requirements.
• Excellent organization, written and oral (English) interpersonal skills, planning skills, etc.

The above lists are intended to describe the general nature and level of work, and they are not intended to be a comprehensive list of all responsibilities, duties and skills required to be qualified and to be performed by the selected candidate. You will have an opportunity to better understand the role through the interview experience.

Pay Range:

The annual pay range for this position is $152,500 - $243,500.

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Ciena is an Equal Opportunity Employer, including disability and protected veteran status.

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