About Marvell
Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities.
At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.
This is an existing vacancy.
Your Team, Your Impact
Marvell's Custom Compute Solutions Business Unit (CCSBU) develops cutting edge semiconductor solutions in the most advanced technologies. Our focus is on solving the biggest problems in the areas of AI, data movement, memory/storage, switch, networking, and other infrastructure applications.solvers in Silicon and has a huge impact on the work done at Marvell. The customers served by this team are often other chip companies and big tech companies, familiar names to all candidates.
What You Can Expect
- Act as a recognized technical expert, providing end-to-end leadership for a major digital IC subsystem or full-chip design disciplines
- Drive architecture and microarchitecture decisions that directly impact product performance, PPA, schedule, and long-term roadmaps
- Solve complex, high-impact technical problems using independent judgement in methods, tools, and evaluation criteria
- Set technical direction and design methodology, influencing best-practice adoption across cross-functional engineering teams
- Serve as technical sponsor in key customer, partner, or vendor engagements and represent Marvell's technical positions
- Mentor and guide engineers, fostering knowlege sharing and directly impacting project execution and delivery quality.
What We're Looking For
- BS/MS in EE/CS with 15+ years of hands-on experience in all aspects of digital design
work including full-chip, subsystem, and IP development.
- Knowledge of semiconductor ASIC design/verification methodologies and flows
- Proven track records of leading ASIC design activities of complex SOC under tight
schedule pressure.
- Strong knowledge of Verilog/System Verilog
- Working experience with digital logic design and verification.
- Technical expert in one or more areas: Ethernet, UA-Link, Data-path Security, Networking/Switching, AXI/APB, NOC fabrics, CPU subsystems, D2D, Low-Speed interfaces (I2C, I3C, UART, SPI, etc), Misc Top-level logic including clocking and PLLs, reset strategies, debug, interrupts, fuses, and PHYs (Ethernet, PCIe, D2D).
- Knowledge of design quality tool flows including lint, CDC, RDC, FEV, etc.
- Demonstrates good analysis, problem-solving, and critical thinking skills
- Effective interpersonal, teamwork, and communication skills
Expected Base Pay Range (CAD)
170,300 - 227,100, $ per annumAdditional Compensation and Benefit Elements
With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We’re dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it’s like to work at Marvell, visit our Careers page.
All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.
Interview Integrity
To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews.
These tools must not be used to record, assist with, or enhance responses in any way. Our interviews are designed to evaluate your individual experience, thought process, and communication skills in real time. Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process.
This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.
Marvell may employ artificial intelligence technologies to assist in the evaluation of job applications. All application reviews include meaningful human involvement, and no hiring decisions are made solely on the basis of automated processing.
#LI-JT2Marvell Technology Ottawa, Ontario, CAN Office
340 Legget Dr #100, Ottawa, ON, Canada, K2K 2A4


