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Semtech

Senior Staff NPI Product Engineer

Reposted 24 Days Ago
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In-Office
Burlington, ON
Senior level
In-Office
Burlington, ON
Senior level
The Sr Staff NPI Product Engineer will support new product development from concept to production, collaborating with cross-functional teams and focusing on Design for Testability, data analysis, and yield optimization.
The summary above was generated by AI

Location: Bristol, UK or Burlington, Canada (Hybrid – 4 days in office)

Our Team

At Semtech, the New Product Introduction (NPI) Product Engineering team is the central force behind every product we bring to market. This team takes full ownership of new product development — guiding each program from concept through to end-of-life with a focus on quality, precision, and execution.

Working across Design, Test, Validation, Quality, Reliability, Applications, and Operations, NPI Product Engineers define testability requirements, drive comprehensive characterization across PVT, ensure ATE-to-bench correlation, optimize yield and test cost, and lead seamless transfer into high-volume manufacturing.
 

The team plays a pivotal role in ensuring our high-performance optical and analog/mixed-signal IC products meet the highest standards of performance, manufacturability, and customer expectation.


Job Summary

We are seeking an NPI Product Engineer to support new product development from early concept through to production release. Working alongside experienced engineers and cross-functional teams, you will develop strong technical foundations while contributing directly to the successful launch of advanced CMOS and BiCMOS semiconductor products.

Reporting to the Manager of NPI Product Engineering, this role offers an excellent opportunity for a motivated engineer to build deep expertise in product engineering, characterization, test strategy, yield optimization, and manufacturing readiness within a fast-paced, high-technology environment.


Responsibilities
1. NPI Program Support & Cross-Functional Collaboration (25%)
  • Support NPI programs from concept through product release and manufacturing transfer
  • Work closely with Design, Test, Validation, Marketing, Quality, Reliability, Applications, and Operations teams
  • Assist with tracking NPI milestones, logistics, and program deliverables
  • Support preparation of product release documentation and OSAT manufacturing readiness materials
  • Develop technical capability through mentorship from senior engineers

2. Design for Testability & Manufacturability (35%)
  • Support definition of Design for Testability (DfT) and Design for Manufacturability (DfM) requirements
  • Assist in development, verification, and optimization of ATE test programs
  • Contribute to product characterization, correlation, and release activities
  • Support datasheet specification finalization and statistically driven test limit definition

3. Characterization, Data Analysis & Yield Optimization (30%)
  • Assist in wafer-level and bench characterization planning and execution
  • Analyze ATE and bench data across PVT variations, including correlation studies
  • Support yield modeling, DOE planning, and test time optimization initiatives
  • Contribute to validation and reliability qualification activities
  • Help identify yield improvement opportunities through data-driven analysis

4. Manufacturing Quality, Failure Analysis & Continuous Improvement (10%)
  • Support yield and quality monitoring across manufacturing stages
  • Assist with test coverage reviews, guard-banding, and limit optimization
  • Contribute to failure analysis and root cause investigations for RMA and field returns
  • Collaborate with foundry and packaging teams to resolve production issues
  • Participate in product lifecycle monitoring and cost-reduction initiatives

Minimum Qualifications
  • BS in Electrical Engineering or related field (MS preferred)
  • 5–8 years’ experience in semiconductor product, test, or design engineering (relevant internships/co-ops considered)
  • Familiarity with statistical data analysis tools such as Excel or JMP
  • Foundational knowledge of semiconductor physics and analog/mixed-signal IC principles
  • Exposure to DfT, DfM, and ATE methodologies is advantageous
  • Awareness of ATE platforms (e.g., Advantest, Teradyne) and bench test equipment is a plus
  • Understanding of semiconductor qualification and reliability standards (JEDEC, HTOL, ESD, Latch-up) is beneficial
  • Strong analytical mindset, problem-solving ability, and communication skills with a desire to learn

The intent of this job description is to describe the major duties and responsibilities performed by incumbents of this job. Incumbents may be required to perform job-related tasks other than those specifically included in this description.

All duties and responsibilities are essential job functions and requirements and are subject to possible modification to reasonably accommodate individuals with disabilities.

We may leverage Artificial Intelligence (AI) tools to enhance efficiency during candidate screening, assessment, and recruitment. Final hiring decisions remain with our Hiring Teams, not AI systems.

A reasonable estimate of the pay range for this position is $94,000 - $122,000.  There are several factors taken into consideration in determining base salary, including but not limited to: job-related qualifications, skills, education and experience, as well as job location and the value of other elements of an employee’s total compensation package.

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